Many modern electronic devices include wireless communications circuitry. For example, an electronic device may include wireless local area network (WLAN) communications circuitry, cellular communications circuitry, or the like. While wireless communications circuitry allows electronic devices to communicate with one another, such functionality generally comes at the cost of additional energy consumption and thus reduced battery life. Often, wireless communications circuitry is the largest consumer of energy in an electronics device. As wireless communications protocols evolve to provide higher speeds, energy consumption of communications circuitry often increases to meet the higher demands of such protocols.
Consumer demand for longer battery life from electronic devices has resulted in the development of many power-saving techniques for wireless communications. One way to conserve power consumed via wireless communications is through the use of envelope tracking. Envelope tracking involves modulating a supply voltage provided to an amplifier based on the instantaneous magnitude (i.e., the envelope) of an RF input signal provided to the amplifier. FIG. 1 illustrates the basic concept of envelope tracking. Specifically, FIG. 1 shows an amplitude-modulated RF signal 10. Conventionally, a constant supply voltage at a level sufficient to ensure adequate headroom across the entire amplitude range of the RF signal 10 would be supplied to the amplifier, as shown by line 12. This results in a significant amount of wasted energy, and thus poor efficiency, when the amplitude of the RF signal 10 is below the maximum level, as illustrated by line 14. Accordingly, an envelope power supply signal tracks the amplitude of the RF signal 10, as illustrated by line 16, and therefore increases efficiency by preventing the unnecessary expenditure of power when the amplitude of the RF signal 10 is below the maximum level.
To employ envelope tracking as described above, electronic devices typically include envelope tracking power converter circuitry configured to generate the envelope tracking power supply signal illustrated by line 16. A functional block diagram illustrating a typical configuration for an RF transmitter section 18 including envelope tracking power converter circuitry 20 is shown in FIG. 2. The RF transmitter section 18 includes the envelope tracking power converter circuitry 20, a power amplifier 22, RF front end circuitry 24, and an antenna 26. The envelope tracking power converter circuitry 20 receives a supply voltage V_SUPP and an envelope control signal ECS and provides an envelope power supply signal EPS from the supply voltage V_SUPP and the envelope control signal ECS. The power amplifier 22 uses the envelope power supply signal EPS to amplify an RF input signal RF_IN and provide an RF output signal RF_OUT. The RF front end circuitry 24 receives the RF output signal RF_OUT and performs any necessary filtering or routing of the signal, ultimately delivering the RF output signal RF_OUT to the antenna 26. As discussed above, using the envelope power supply signal EPS to amplify the RF input signal RF_IN and provide the RF output signal RF_OUT results in a significant increase in the efficiency of the RF transmitter section 18.
The envelope control signal ECS may be generated in any number of different ways, the details of which will be appreciated by those of ordinary skill in the art. For example, envelope tracking circuitry may receive a baseband input signal, the RF input signal RF_IN, the RF output signal RF_OUT, and/or may be in communication with a modulator in order to detect an envelope of the signal. The envelope tracking circuitry may then communicate with a look-up table that provides the envelope control signal ECS based on the detected envelope. In some cases, such a look-up table may provide the envelope control signal ECS according to an isogain contour of the power amplifier 22 in order to compensate for changes in linearity of the power amplifier 22 as the envelope power supply signal EPS changes.
FIG. 3 is a functional block diagram illustrating details of the envelope tracking power converter circuitry 20. The envelope tracking power converter circuitry 20 includes main power converter switching circuitry 28 configured to receive the supply voltage V_SUPP and provide a main converted power supply signal MCPS from a holding inductor L_HLD to a smoothing capacitor C_SMTH. In particular, the main converted power supply signal MCPS is provided based on a main power converter control signal MPCC provided from main power converter control circuitry 30. A number of main power converter flying capacitors C_FLYM and the holding inductor L_HLD are charged and discharged by the main power converter switching circuitry 28 to provide the main converter power supply signal MCPS. The holding inductor L_HLD stores and supplies power as required to provide the majority of the envelope power supply signal EPS. The smoothing capacitor C_SMTH reduces ripple that may be present in the envelope power supply signal EPS. The main power converter switching circuitry 28 generally forms a buck/boost converter with the main power converter flying capacitors C_FLYM and the holding inductor L_HLD, the details of which will be readily appreciated by those of ordinary skill in the art. The main power converter control signal MPCC may thus include a plurality of control signals each configured to control a different switching element in the main power converter switching circuitry 28 in order to deliver a desired voltage and/or current to the main power converter flying capacitors C_FLYM and the holding inductor L_HLD.
Parallel amplifier power converter switching circuitry 32 also receives the supply voltage V_SUPP and provides a parallel amplifier supply voltage PA_SUPP to a parallel amplifier 34. In particular, the parallel amplifier power converter switching circuitry 32 charges and discharges a parallel amplifier power converter capacitor C_PA and a parallel amplifier power converter inductor L_PA to provide the parallel amplifier power supply voltage PA_SUPP. The parallel amplifier supply voltage PA_SUPP is provided based on a parallel amplifier power converter control signal PAPCC, which is provided by parallel amplifier power converter control circuitry 36. The parallel amplifier power converter switching circuitry 32 may form a buck/boost converter with the parallel amplifier power converter capacitor C_PA and the parallel amplifier power converter inductor L_PA, similar to the main power converter switching circuitry 28 discussed above. However, the power demand of the parallel amplifier 34 is significantly less than that of a power amplifier for which the envelope power supply signal EPS is generated. Accordingly, the switching components within the parallel amplifier power converter switching circuitry 32 will be significantly smaller than those in the main power converter switching circuitry 28. Further, the parallel amplifier power converter capacitor C_PA and the parallel amplifier power converter inductor L_PA are generally significantly smaller than the main power converter flying capacitors C_FLYM and the holding inductor L_HLD, respectively.
Signal conditioning circuitry 38 receives the envelope control signal(s) ECS, which may be a differential signal. These envelope control signal(s) ECS, which indicate a target value of the envelope power supply signal EPS, are conditioned and forwarded to the parallel amplifier 34 as conditioned envelope control signal(s) ECS_C. Further, the envelope control signal(s) or one or more derivatives thereof are provided to the parallel amplifier power converter control circuitry 36, where they are used to provide to the parallel amplifier power converter control signal PAPCC. In particular, the parallel amplifier power converter control signal PAPCC is used to provide a minimum parallel amplifier supply voltage PA_SUPP necessary for the parallel amplifier 34 to operate and control the envelope power supply signal EPS as discussed below.
In addition to the parallel amplifier supply voltage PA_SUPP and the conditioned envelope control signal(s) ECS_C, the parallel amplifier 34 also receives a feedback signal FB via a voltage divider formed from a first feedback resistor R_FB1 and a second feedback resistor R_FB2. Using these signals, the parallel amplifier 34 provides an output voltage V_OUT and an output current I_OUT. Specifically, the parallel amplifier 34 acts similar to an operational amplifier, and attempts to equalize the voltage on an inverted terminal and a non-inverted terminal by changing the output voltage V_OUT and the output current I_OUT thereof. The output voltage V_OUT is delivered to an offset capacitor C_OFF, which is coupled between the holding inductor L_HLD and the smoothing capacitor C_SMTH. In general, the output voltage V_OUT contributes minimally to the envelope power supply signal EPS, acting only as a control for the main power converter switching circuitry 28. However, in some situations where the main power converter switching circuitry 28 along with the main power converter flying capacitors C_FLYM and the holding inductor L_HLD are incapable of providing or maintaining a particular envelope power supply signal EPS (e.g., due to very high bandwidth of the envelope power supply signal EPS and the fact that the rate of change of the current provided by the holding inductor L_HLD is limited), the output voltage V_OUT may contribute to the envelope power supply signal EPS for short periods of time. The offset capacitor C_OFF, in addition to storing charge that may be required to boost the envelope power supply signal EPS in times of rapid change or large signal amplitudes as discussed above, also reduces the necessary dynamic range of the output voltage V_OUT from the parallel amplifier 34 to maintain full control over the envelope power supply signal EPS. This in turn reduces the necessary parallel amplifier supply voltage PA_SUPP and thus improves efficiency. The output current I_OUT is provided to the main power converter control circuitry 30, and is used to generate the main power converter control signal MPCC. Accordingly, the parallel amplifier 34 acts primarily as a master device, with the main power converter switching circuitry 28 as a slave device via the output current I_OUT from the parallel amplifier 34. This design choice is due to the fact that the parallel amplifier 34 is a linear amplifier that is not very efficient at providing signals with the dynamic range of the envelope power supply signal EPS, while the main power converter switching circuitry 28 is very efficient at doing so. Operating the main power converter switching circuitry 28 and the parallel amplifier 34 in this manner thus allows for accurate envelope tracking with good efficiency.
Bandwidth aggregation techniques such as carrier aggregation and multiple-input-multiple-output (MIMO) have become commonplace in wireless communications devices. Downlink carrier aggregation occurs when multiple RF signals are simultaneously received by a mobile communications device. Uplink carrier aggregation occurs when multiple RF signals are simultaneously transmitted from a wireless communications device. An exemplary RF transmitter section 40 capable of uplink carrier aggregation is shown in FIG. 4. The RF transmitter section 40 includes first envelope tracking power converter circuitry 42, a first power amplifier 44, second envelope tracking power converter circuitry 46, a second power amplifier 48, RF front end circuitry 50, a first antenna 52A, and a second antenna 52B. The first envelope tracking power converter circuitry 42 receives the supply voltage V_SUPP and a first envelope control signal ECS1 and provides a first envelope power supply signal EPS1 to the first power amplifier 44. The second envelope tracking power converter circuitry 46 receives the supply voltage V_SUPP and a second envelope control signal ECS2 and provides a second envelope power supply signal EPS2 to the second power amplifier 48. The first power amplifier 44 uses the first envelope power supply signal EPS1 to amplify a first RF input signal RF_IN1 and provide a first RF output signal RF_OUT1. The second power amplifier 48 uses the second envelope power supply signal EPS2 to amplify a second RF input signal RF_IN2 and provide a second RF output signal RF_OUT2. The RF front end circuitry 50 performs filtering and routing on the first RF output signal RF_OUT1 and the second RF output signal RF_OUT2, providing each of these signals to a different one of the antennas 52. Accordingly, the RF transmitter section 40 may perform uplink carrier aggregation.
While the RF transmitter section 40 is capable of performing uplink carrier aggregation with envelope tracking for multiple power amplifiers, such functionality comes at the cost of significantly increased area of the RF transmitter section 40. Each one of the first envelope tracking power converter circuitry 42 and the second envelope tracking power converter circuitry 46 may be quite large due to the various inductive elements, capacitive elements, and switching elements contained therein (particularly in the main power converter switching circuitry 28 and the parallel amplifier power converter switching circuitry 32 discussed above). Providing envelope tracking power converter circuitry for each uplink carrier aggregation transmitter may therefore not be suitable for mobile communications devices in which space is highly limited. Accordingly, there is a need for improved envelope power converter circuitry that is small in size and capable of supporting uplink carrier aggregation.